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Hardware root/JTAG pinout

OP Determined

17th May 2014, 01:08 AM   |  #21  
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Quote:
Originally Posted by jcase

I spent a bit trying today, I never could get a response from RTCK at all

Ignore it, RTCK is not always available and JTAG works without it as long as your clock is within acceptable range. I used 1000khz-3000khz. Don't know if clock is configurable in riffbox that I believe you use. Also, does riffbox support 1.8v levels?
17th May 2014, 01:54 AM   |  #22  
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Quote:
Originally Posted by Determined

Ignore it, RTCK is not always available and JTAG works without it as long as your clock is within acceptable range. I used 1000khz-3000khz. Don't know if clock is configurable in riffbox that I believe you use. Also, does riffbox support 1.8v levels?

Clock is configurable, I believe it does 1.8 but I'm not home now so can't verify

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17th May 2014, 08:29 PM   |  #23  
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Hi!

One noob question, if you can develop a root method or a way to flash the device using jtag, what kind of device will be necessary to do it?

something like this? http://dangerousprototypes.com/docs/Bus_Blaster

thanks!
10th June 2014, 05:34 PM   |  #24  
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Any advances with JTAG?

thanks!
4th July 2014, 09:50 AM   |  #25  
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Quote:
Originally Posted by Determined

Connecting to JTAG with OpenOCD needs a few changes in the cortex_a.c source to enable support for Cortex-A15. If you actually make those changes and play with debug registers, you will discover that DBGEN and SPIDEN signals/fuses are disabled, so debug mode is not accessible.

I have not yet tried flashing.

that's not true, i currently play with openocd, flyswatter2 and ifc6410 (another apq8064 box) and i discovered, that problem is how openocd handles writing to crtlstat register. seems openocd implements dap ver. 0 way, but not dap ver. 1 and dap ver. 2 ways. i'm currently diving to arm coresight documentation and openocd code.
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4th July 2014, 04:57 PM   |  #26  
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Quote:
Originally Posted by cz172638

that's not true, i currently play with openocd, flyswatter2 and ifc6410 (another apq8064 box) and i discovered, that problem is how openocd handles writing to crtlstat register. seems openocd implements dap ver. 0 way, but not dap ver. 1 and dap ver. 2 ways. i'm currently diving to arm coresight documentation and openocd code.

Good to know that somebody is working in JTAG solution for AFTV box. Let us know your findings!

Thanks!
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