[Q] [HP RC12 OTF] Asynchronous clock/power-gating of Tegra2
When looking at tegrastats reports in logcat, CPU1 (2nd core) can be off
. However, I've read that Tegra2 CPUs (A9 cores) can be clock-gated and power-gated, but not asynchronously
. Therefore, the 2nd core can't be off whithout the 1st one being off too.
Can someone please enlighten me on how it is possible? Do I miss something or does android show the 2nd core off when it is actually not? Then isn't it better to make CPU1 always on (by reducing mincpu1on on RC12 OTF by spica1234 - big thanks to him for his work - for exemple)?
Also, a question for spica1234, or anyone who understood it better than me, what does suspend_core_mv then? If it isn't asynchronous, then this voltage is applied to both cores, isn't it?