Constant I/O access timing in XScale 270
I'm developing system software for Pocket PCs based on Intel XScale 270.
In a program, I need constant I/O timing in accessing external devices. I have been able to obtain constant I/O timing in accessing such devices as Internal Memory and Clocks Manager Registers. However, when I tried to access hardware registers in the Memory Controller or non-cached memory locations which were mapped through the Memory Controller, I got fluctuating timing. The reason could be due to Memory Controller's activity of refreshing SDRAMs or something else.
My question is how to achieve constant I/O timing in accessing Memory Controller registers and devices mapped through the Memory Controller. How do I obtain documents describing the Memory Controler's working architecture in more detail than the description in the PXA27X Developer Manual?