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Hermes CPLD
Hermes CPLD
Hermes CPLD is located at 0x08000000.
The chip is accessed in 16bit mode. It appears the top 4 data lines are floating and return random values (though usually zero). As such, the top four bits should just be ignored.
Unlike other CPLD chips, the hermes implementation allows one to read back the state of output gpios.
Known GPIOs:
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||*Apin* 0x0 || bit || Description Bank1
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|| GPIOA0 ||0x0001||
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|| GPIOA1 ||0x0002|| Phone related On during suspend ?
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|| GPIOA2 ||0x0004|| BT reset:0,msleep 10,1,msleep 10
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|| GPIOA3 ||0x0008|| Phone related
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|| GPIOA4 ||0x0010|| Phone related
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|| GPIOA5 ||0x0020||
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|| GPIOA6 ||0x0040|| Always on? (off when suspending)
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|| GPIOA7 ||0x0080|| BT power1
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|| GPIOA8 ||0x0100|| UARTs related
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|| GPIOA9 ||0x0200|| ATI reset.
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|| GPIOA10|| 0x0400|| On to disable charger
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|| GPIOA11|| 0x0800|| Phone related. On when phone on (seq #1)
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||*Bpin* 0x2 || bit || Description Bank2
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|| GPIOB0 ||0x0001|| On when phone on (seq #2)
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|| GPIOB1 ||0x0002|| wifi pwr3 1
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|| GPIOB2 ||0x0004|| BKL power1 (off when suspending)
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|| GPIOB3 ||0x0008|| KBD backlight 1
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|| GPIOB4 ||0x0010|| wifi pwr4?=on (off when suspending)
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|| GPIOB5 ||0x0020|| wifi pwr11
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|| GPIOB6 ||0x0040|| wifi pwr2 1
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|| GPIOB7 ||0x0080||
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|| GPIOB8 ||0x0100||
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|| GPIOB9 ||0x0200||
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|| GPIOB10 ||0x0400||
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|| GPIOB11 ||0x0800||
The "C" register is used for IRQ acknowledgements. When a CPLD IRQ occurs the cpu receives an EINT1 irq (GPF1 gpio). The irq is acked by writing back a 1 bit to the line. |- ||*Cpin* 0x4 || bit || Description Bank3 |- || GPIOC0 ||0x0001|| |- || GPIOC1 ||0x0002|| irq (CD0) sd insert ? |- || GPIOC2 ||0x0004|| irq (CD1) |- || GPIOC3 ||0x0008|| Mini-usb plug IRQ (Cable) |- || GPIOC4 ||0x0010|| Jog wheel up IRQ (CW) |- || GPIOC5 ||0x0020|| Jog wheel down IRQ (CCW) |- || GPIOC6 ||0x0040|| |- || GPIOC7 ||0x0080|| |- || GPIOC8 ||0x0100|| |- || GPIOC9 ||0x0200|| |- || GPIOC10 ||0x0400|| |- || GPIOC11 ||0x0800||
The "D" register appears to be input pins? |- ||*Dpin* 0x6 || bit || Description Bank4 |- || GPIOD0 ||0x0001|| Always on? |- || GPIOD1 ||0x0002|| |- || GPIOD2 ||0x0004|| |- || GPIOD3 ||0x0008|| On when plug in (AC or USB) |- || GPIOD4 ||0x0010|| On for keyboard light detect |- || GPIOD5 ||0x0020|| |- || GPIOD6 ||0x0040|| |- || GPIOD7 ||0x0080|| |- || GPIOD8 ||0x0100|| |- || GPIOD9 ||0x0200|| |- || GPIOD10 ||0x0400|| |- || GPIOD11 ||0x0800||
The "E" register appears to be input pins. |- ||*Epin* 0x8 || bit || Description Bank5 |- || GPIOE0 ||0x0001|| |- || GPIOE1 ||0x0002|| AC detect |- || GPIOE2 ||0x0004|| Power detect (AC or USB) |- || GPIOE3 ||0x0008|| |- || GPIOE4 ||0x0010|| |- || GPIOE5 ||0x0020|| |- || GPIOE6 ||0x0040|| |- || GPIOE7 ||0x0080|| |- || GPIOE8 ||0x0100|| CPLDVER0 |- || GPIOE9 ||0x0200|| CPLDVER1 |- || GPIOE10 ||0x0400|| CPLDVER2 |- || GPIOE11 ||0x0800|| CPLDVER3
|- ||*Fpin* 0xa || bit || Desciption Bank6 (readonly) |- || GPIOF0 ||0x0001|| |- || GPIOF1 ||0x0002|| |- || GPIOF2 ||0x0004|| |- || GPIOF3 ||0x0008|| |- || GPIOF4 ||0x0010|| |- || GPIOF5 ||0x0020|| |- || GPIOF6 ||0x0040|| |- || GPIOF7 ||0x0080|| |- || GPIOF8 ||0x0100|| |- || GPIOF9 ||0x0200|| |- || GPIOF10 ||0x0400|| |- || GPIOF11 ||0x0800||
