Having managed to download the schematics and the Tegra 3 data sheets, and then spending the last 3 hours studying them, I have discovered the following:
Using the OTG connector for Internal storage would only be possible with some form of physical switching of the data and ID lines, the connector is hardwired to both the processor and the charging circuit. While there is a data device connected, it is unlikely that the charge control circuitry would allow high current charging to take place through the OTG connector even with a custom kernel, it may however be possible to trickle / maintain the battery while using the port. There is no electronic reason (I can see) why high current charging can't take place using the dock connector while the OTG connector is in use.
The Tegra 3 processor has 4 available USB ports, there is only mention of three being used on the schematics. USB1 is directly connected to the OTG connector, USB2 is used for the 3G module, USB3 was intended to be used for the side dock (POGO) connector (but this has not been implemented).
There is a connection to the Tegra's UART through the headphone connector, it appears to be a debug connection, and I doubt it will be of any real use.
I think our best hope of internal USB will be from the USB2, it should be easy to find on a 3G equipped unit, less so on a WiFi only (like mine) version. Dependant on soldering skills, it could be possible to break into the data lines on a 3G unit and install a small hub.
When my eBay unit arrives, I will get onto it!!
It would be great if the unused USB ports came out to some of the test points (small copper colored dots on the PCB used during bed of nails PCB testing at the factory). Typically, when ports like these are not used, they are tied high or low. When tied high, it's usually through a pullup resistor. If someone has the programmers reference and can write a small pgm to check the USB ports to see if they're high or low, that would be a start.
Sent from my Nexus 7 using xda app-developers app