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tf201 on uart debug interfce

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By fullcontrol, Junior Member on 6th March 2013, 02:23 AM
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hi all im electronic tech i have brick my tablet when try flash in fastboot adb fastboot mode clockwork recovery 5.8xx first device opened and boot up normal without any problem then i reboot few time i have not seen cwm menu and i wipe data and tablet hardly bricked lol

so i start to find the way how to unbrick it without nvflash wheelie Secure Boot Key (blob.bin) because i not backup it. and still i don't know how to backup it!?
After a long research tegra based schematics and nvidia tegra dev docs, some forum posts, for my prime i got the idea from google nexus 7 schematic there used same pin con. figure
this post nexus7 sch http://forum.xda-developers.com/show...0&postcount=86
i find in printed circuit board GMI_OE_N, FORCE_RECOVERY#, and Uart Debug, jtag. connector pinout for comminication but that socket and some resistor used only for development process and test. its unmounted for production.

first i try FORCE_RECOVERY# pin when i power on tablet short it with ground device entered directly APX mode but that is same with vol power button combination tegra Soc still not allowed me to access emmc nand.
I started to research uart debugin i find this post http://forum.xda-developers.com/show....php?t=1081743 little information about howto tegra uart debug to understand what has happened to the bootloader
in experiment first i see in terminal garbage ascii characters i change TTL the location of the wire uart TXD, and uart RXD. "UART_DEBUG_TXD <-> UART_DEBUG_RXD" for tf201 showed me the right uart log in terminal meybe jtag pins are different placed i still not sure? but F_Recovery, pin and Hot_reset, pin are in same place VDD1.8v pin where have in right placed! i have edit schematic picture with paint for correction
i use for Uart debugin Usb TTL adapter pl2303 and PuTTY terminal emulator

How to: UART
1. Connect TTL to source device TX
2. Connect TTL RxD to source device RX
3. Connect TTL GND to source device GND! (don't forgot it!)
5. Open a terminal emulator, like PuTTY.

Connection parameters:
115200, 8 n 1, no flow control

Warning! Use this information at your own risk. Will void your warranty!

!don't Unmount nothing in pcb!

edited by me 24pin con. points schematic Click image for larger version

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mb pad connector pic Click image for larger version

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here is the power on boot debug log

Code:
-Mé11AÁé¢ÂZ¡é)9YI8
-MéAUéºZ¡é)9YI8I8 1=
½¹Ñɽ±±ÉéªRre%Õiêjjj¥*áÑɹ
½¹Ñɽ±±ÉéªRş
ADJUSTED CLOCKS:
MC clock is set to 250000 KHz
EMC clock is set to 500000 KHz (DDR clock is at 500000 KHz)
PLLX0 clock is set to 700000 KHz
PLLC0 clock is set to 600000 KHz
CPU clock is set to 700000 KHz
System and AVP clock is set to 102000 KHz
GraphicsHost clock is set to 163200 KHz
3D clock is set to  83333 KHz
2D clock is set to  83333 KHz
Epp clock is set to  83333 KHz
Mpe clock is set to  83333 KHz
Vde clock is set to 272000 KHz
Bootloader Start at:2017 ms
PCB value(0x0)
Initializing Display
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
Inval idate-only cache maint not supported in NvOs
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
LowLowBatteryCheck
LowLowBattery Check pinvalue=0
Battery capacity >low low Battery voltage
PCB value(0x0)Show mdpilogo
show logo at 2814ms
[bootloader] (built on Nov 22 2012, 20:19:53)
Platform Pre Boot configuration...
Verify chip uid
chip uid 1st RSAVerify ok
The Device is UnLocked.
SocCpuMaxKHz = 1000000
SocCpuMinKHz = 32
PLLX0 FreqKHz = 700000
Checking for android ota recovery
PCB value(0x0)
Platform Pre OS Boot configuration...
HDMI CPLD Program - ERROR
HDMI CPLD Program - ERROR
CpldRead8(): Failed: SlaveNotFound slave Add 0xd2
The enabling SDMMC1 Power rail is FAILED.
Actual Size = 0x540800 bytes
Verify chip uid
chip uid 1st RSAVerify ok
The proc BoardInfo: 0x0222:0x8200:0xe0:0x4f:0x44
PCB value(0x0)
!!!ERROR!!! EKS Partition is not available
Jumping to kernel at:3737 ms
"END"

i find jelly bean internal FLASH ROM partition table documentation for lg x4 HD tegra3 based SoC
chinse http://bbs.gfan.com/android-5633570-1-1.html

The EKS hidden partition 2M
The "NVEKSP" logo, followed by a 2048-bit key and guess verify boot.img with the public key. Using RAS (guess) algorithm SOS and LNX partition data do signature verification, signature data block (1024 bytes) in the tail of the SOS and LNX partition data.

[partition]
name=EKS
id=6
type=data
allocation_policy=sequential
filesystem_type=basic
size=81200
file_system_attribute=0
partition_attribute=0
allocation_attribute=8
percent_reserved=0
filename=eks.dat

thanks
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6th March 2013, 08:22 AM |#2  
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Quote:
Originally Posted by fullcontrol

hi all in my bricked tablet i find my uart debug pins on pcb in terminal here is the on boot log it have chanse to i unbrick it ?




-Mé11AÁé¢ÂZ¡é)9YI8
-MéAUéºZ¡é)9YI8I8 1=
½¹Ñɽ±±ÉéªRre%Õiêjjj¥*áÑɹ
½¹Ñɽ±±ÉéªRş
ADJUSTED CLOCKS:
MC clock is set to 250000 KHz
EMC clock is set to 500000 KHz (DDR clock is at 500000 KHz)
PLLX0 clock is set to 700000 KHz
PLLC0 clock is set to 600000 KHz
CPU clock is set to 700000 KHz
System and AVP clock is set to 102000 KHz
GraphicsHost clock is set to 163200 KHz
3D clock is set to 83333 KHz
2D clock is set to 83333 KHz
Epp clock is set to 83333 KHz
Mpe clock is set to 83333 KHz
Vde clock is set to 272000 KHz
Bootloader Start at:2017 ms
PCB value(0x0)
Initializing Display
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
Inval idate-only cache maint not supported in NvOs
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
PCB value(0x0)
LowLowBatteryCheck
LowLowBattery Check pinvalue=0
Battery capacity >low low Battery voltage
PCB value(0x0)Show mdpilogo
show logo at 2814ms
[bootloader] (built on Nov 22 2012, 20:19:53)
Platform Pre Boot configuration...
Verify chip uid
chip uid 1st RSAVerify ok
The Device is UnLocked.
SocCpuMaxKHz = 1000000
SocCpuMinKHz = 32
PLLX0 FreqKHz = 700000
Checking for android ota recovery
PCB value(0x0)
Platform Pre OS Boot configuration...
HDMI CPLD Program - ERROR
HDMI CPLD Program - ERROR
CpldRead8(): Failed: SlaveNotFound slave Add 0xd2
The enabling SDMMC1 Power rail is FAILED.
Actual Size = 0x540800 bytes
Verify chip uid
chip uid 1st RSAVerify ok
The proc BoardInfo: 0x0222:0x8200:0xe0:0x4f:0x44
PCB value(0x0)
!!!ERROR!!! EKS Partition is not available
Jumping to kernel at:3737 ms

thanks

1) where is the uart?

2) is that all there is of the log?
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6th March 2013, 11:27 AM |#3  
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yes its all log frezed on asus logo not continue meybe it is first warmboot sorry i will edit first post for points for uart debuging txd and rxd pins still not redy drawing. meybe i find too jtag pin points too still i not sure
6th March 2013, 12:33 PM |#4  
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Re: tf201 on uart debug interfce
Quote:
Originally Posted by fullcontrol

yes its all log frezed on asus logo not continue meybe it is first warmboot sorry i will edit first post for points for uart debuging txd and rxd pins still not redy drawing. meybe i find too jtag pin points too still i not sure

How did you brick your Prime? Did you check the unbricking thread?
6th March 2013, 02:45 PM |#5  
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Quote:
Originally Posted by fullcontrol

yes its all log frezed on asus logo not continue meybe it is first warmboot sorry i will edit first post for points for uart debuging txd and rxd pins still not redy drawing. meybe i find too jtag pin points too still i not sure

have you tried holding vol-down?
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6th March 2013, 10:57 PM |#6  
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first post have been updated... i hope it will be helpful for you

i brick it when i send clockwork 5x img in fastboot adb mode first i have no problem with boot up after few a reboot enter in fastmode try to active cwm menu and didnt see cwm recovery menu i have do wipe data wipe process gone long time and i power off my tablet then tablet bricked sty in asus logo only. vol power button combination not help i see nothing there is full log what happened on boot
7th March 2013, 12:19 AM |#7  
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i not underdstand why on debug i see only command end line not all commands meybe UART4_TXD n UART4_RXD not connected? i will check it soon
what mean "Checking for android ota recovery" i have try with microSD put there firmware not work i not have otg for test i will build one later meybe look special file name? or boot look some recovery file in any port!? devs will be know it i think all answers have in oficial kernel im not dev programmer to i find sorry i will try soon
wipe data or cwm kill my "EKS Partition" it is for jelly bean partition table here is link for jelly bean partition table http://forum.xda-developers.com/show...php?p=38754475
7th March 2013, 11:07 AM |#8  
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Looking over your log, and with the new information sadly you have a bricked unit.

JTAG is fused off on production devices, so that is out, and it looks like you have a boot to recovery flag set, but a broken recovery partition.

There is one thing you could try if you are up to it, but it really isn't the most simple exercise, find the mmc data lines, wire that up to an mmc reader, then using your pc find the misc partition and clean it.
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7th March 2013, 01:11 PM |#9  
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Quote:
Originally Posted by lilstevie

Looking over your log, and with the new information sadly you have a bricked unit.

JTAG is fused off on production devices, so that is out, and it looks like you have a boot to recovery flag set, but a broken recovery partition.

There is one thing you could try if you are up to it, but it really isn't the most simple exercise, find the mmc data lines, wire that up to an mmc reader, then using your pc find the misc partition and clean it.

thanks for your advice yes i have jrag before arm power pc stb processors arm cpu must be enter test mode to allow jtagin! it is rulle
tegra based arm have that pin TEST_MODE_EN R28 i not have t30 bga stenchil to remove cpu to folow that lines i will check it soon
and update first post im just lazy
last other possibility is to i remove nand flash and place different arm device to root or programmer to reflash it easy but i need worked dump file stil emmc nand is new not all devices use that nand.

sorry you mean SDmmc or nand device there have alot memmory controler data lines
7th March 2013, 01:58 PM |#10  
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Quote:
Originally Posted by fullcontrol

thanks for your advice yes i have jrag before arm power pc stb processors arm cpu must be enter test mode to allow jtagin! it is rulle
tegra based arm have that pin TEST_MODE_EN R28 i not have t30 bga stenchil to remove cpu to folow that lines i will check it soon
and update first post im just lazy
last other possibility is to i remove nand flash and place different arm device to root or programmer to reflash it easy but i need worked dump file stil emmc nand is new not all devices use that nand.

sorry you mean SDmmc or nand device there have alot memmory controler data lines

the test mode pin is irrelevant, the device has an efuse block that when a specific fuse is blown (ODM_SECURE) JTAG is strictly prohibited by the bootrom, this is inside the SoC and not exposed externally at all.

While the emmc may have many many pins underneath it, there are only a limited number in use as it isn't attached as nand but rather mmc, and connected to the tegras mmc bus, with a little bit of time and probing you would be able to figure out which pins are required for data, there is even a possibility of disabling the emmc as it tries to read the boot flag but timing that would be extremely hard, and it would be easier to figure out the data bus.

Your only other real option is to send it to asus
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18th March 2013, 12:28 PM |#11  
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Can you explain with a little more detail exactly what you did to get uart working? I've looked over the the instructions and they aren't very clear (I do understand that English is not your first language and that does make it harder).

I've tried to follow them myself and I'm not having much success really
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