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Defy Mini: Updated the overclock-module

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By Bernd.Defy, Member on 27th March 2013, 10:15 PM
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-- Update:
User Guitwo2 wrote an excellent init.d-script to load the overclock-module on boot. To make it even easier to use, he made a flashable zip. See this post: http://forum.xda-developers.com/show...79&postcount=6


Hi,

i recently updated the overclock-module (see attachement). Before starting it, find the required addresses in memory, as the module's defaults match only the RTFR-Firmware:
  1. Find address of transition-table
    Open adb-shell, become su and type
    Code:
    cat /proc/kallsyms | grep -A 1 pll0_960_pll1_245_pll2_1200_pll4_800_25a
    You'll find the address at the leftmost side in the first row of the result.
  2. Find address time-in-state-table
    In the same shell, type
    Code:
    cat /proc/kallsyms | grep -A 1 cpufreq_stats_table
    Again, the required address ist at the left side of the first row.

Then, one can try to install the kernel module. Parameter "pll2_l_val" ist used to adjust the multiplier of pll2. Default is 62, i got it stable at 69 (=CPU-Speed of 69 * 19.2 Mhz / 2 = 662 MHz). You can also try to set the multipliers of pll0 and pll1. I didn't test it.

So, with the above addresses one types the following to load the kernel module (replace the addresses with the ones you found, where parameter acpu_freq_tbl_addr equals transition-table and parameter cpufreq_stats_tbl_addr takes the time-in-state-table-address) :

Code:
busybox insmod /sdcard/temp/defymini_oc.ko pll2_l_val=63 acpu_freq_tbl_addr=0xc0755bdc cpufreq_stats_tbl_addr=0xc0789134
Update: In version 0.3 there is another parameter, "vdd", which takes a value between 1 and 7 (don't play with it, as there is no error handling!), where 1 is the lowest and 7 the highest vdd. Default is 6.

CHANGELOG
2013-04-29 0.4 added source (use it for other devices with locked bootloader)
2013-04-08 0.4 beautified messages, show current vdd
2013-04-01 0.3 added vdd-level for highest freq as parameter
2013-03-27 0.2 added time-in-state table modification (CPUSpy etc)
2013-03-21 0.1 initial release
Attached Files
File Type: zip defymini_oc_v0.2.zip - [Click for QR Code] (2.5 KB, 420 views)
File Type: zip defymini_oc_v0.3.zip - [Click for QR Code] (3.5 KB, 174 views)
File Type: zip defymini_oc_v0.4.zip - [Click for QR Code] (3.7 KB, 481 views)
File Type: zip defymini_oc_v0.4_sources.zip - [Click for QR Code] (2.4 KB, 395 views)
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27th March 2013, 11:08 PM |#2  
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Quote:
Originally Posted by rootdefyxt320

Can we change the socinfo_get_msm_cpu() or is it already fused into the silicon chip?

No, but we can change the definition for soc-id 96 to msm7225aa. I did it. Didn't work. when switching to 800Mhz via PLL4, device hangs and reboots.
27th March 2013, 11:58 PM |#3  
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Using cat /proc/kallsyms | grep -A 1 pll0_960_pll1_245_pll2_1200_pll4_800_25a gives grep: not found
write: Broken pipe
28th March 2013, 12:51 AM |#4  
Quote:
Originally Posted by Bernd.Defy

No, but we can change the definition for soc-id 96 to msm7225aa. I did it. Didn't work. when switching to 800Mhz via PLL4, device hangs and reboots.

Probably not supported in kernel or we can try some how to patch it via modules like the Motorola Defy MB525/MB526 which has a locked bootloader or try to obtain the Defy XT535 kernel aka boot.img and flash it via fastboot but it's risky. I can't get the memory addresses. Just upload your boot.img from your nandroid backup so I can flash it via fastboot. What's the difference between PLL2 overclocking and PLL4 overclock?
28th March 2013, 07:56 AM |#5  
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Quote:
Originally Posted by Bernd.Defy

Hi,

i recently updated the overclock-module (see attachement). Before starting it, find the required addresses in memory, as the module's defaults match only the RTFR-Firmware:

  1. Find address of transition-table
    Open adb-shell, become su and type
    Code:
    cat /proc/kallsyms | grep -A 1 pll0_960_pll1_245_pll2_1200_pll4_800_25a
    You'll find the address at the leftmost side in the first row of the result.
  2. Find address time-in-state-table
    In the same shell, type
    Code:
    cat /proc/kallsyms | grep -A 1 cpufreq_stats_table
    Again, the required address ist at the left side of the first row.

Then, one can try to install the kernel module. Parameter "pll2_l_val" ist used to adjust the multiplier of pll2. Default is 62, i got it stable at 69 (=CPU-Speed of 69 * 19.2 Mhz / 2 = 662 MHz). You can also try to set the multipliers of pll0 and pll1. I didn't test it.

So, with the above addresses one types the following to load the kernel module (replace the addresses with the ones you found, where parameter acpu_freq_tbl_addr equals transition-table and parameter cpufreq_stats_tbl_addr takes the time-in-state-table-address) :

Code:
busybox insmod /sdcard/temp/defymini_oc.ko pll2_l_val=63 acpu_freq_tbl_addr=0xc0755bdc cpufreq_stats_tbl_addr=0xc0789134


I just followed your instructions.
The addresses were the same.
It seems to work so far.
Mine seems stable too.
Great work !
I am loading it on boot via a init.d script.

With : TNBST_4_0A.1F.0ERPS - WE_Orange_Spain_v22_0223_FLEXTNBST

What could we probably gain by increasing PLL0 and PLL1 ?
And which value should we choose ?

With pll2: 70 I get 672MHz stable.
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28th March 2013, 11:08 AM |#6  
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Quote:
Originally Posted by Sh0m1

Using cat /proc/kallsyms | grep -A 1 pll0_960_pll1_245_pll2_1200_pll4_800_25a gives grep: not found
write: Broken pipe

Code:
cat /proc/kallsyms > /sdcard/toto.log
Then search for pll0_960_pll1_245_pll2_1200_pll4_800_25a in the /sdcard/toto.log file.

---------- Post added at 11:08 AM ---------- Previous post was at 10:38 AM ----------

If you want to load the module on boot and have init.d support, there is attached a init.d script that will do it automatically.

There is a CWM flashable zip

0 - push the XT320_overclock.zip on your sdcard
1 - Make sure you have busybox installed
2 - Reboot with a CWM... (recovery.img attached)
Code:
>adb reboot bootloader
> fastboot boot recovery.img
3 - Flash XT320_overclock.zip thorough CWM
4 - Enjoy !

Default values are : pll2=69 and vdd=6
Edit /etc/init.d/66ocmodule for further tweaking.


In V2 - updater-script has been updated, to fix busybox permission issues.

66ocmodule script change log :

V0.1
First be sure to adjust pll2_l_val, acpu_freq_tbl_addr and cpufreq_stats_tbl_addr.
Be sure that defymini_oc.ko is in /sdcard/
1 - push the module to your phone :
Code:
adb push 66ocmodule.txt /sdcard/66ocmodule.txt
2 - in shell mode, remove the extension .txt and move the file to /etc/init.d folder
Code:
mv /sdcard/66ocmodule.txt /etc/init.d/66ocmodule
3 - Change mode to -rwxrwxrwx
Code:
chmod 777 /etc/init.d/66ocmodule
4 - Change user/group to root/root
Code:
chown 0.0 /etc/init.d/66ocmodule
That should work.

NB : you may have to remount your /system partition in rw to change user/group
Code:
busybox mount -o remount,rw -t auto /system
NB2: For init.d support go to : http://forum.xda-developers.com/show....php?t=1933849

NB3: have only one version of 66ocmodule in your /etc/init.d directory to avoid trouble.

NB4: if you are experiencing trouble with step 2, use
Code:
cp /sdcard/66ocmodule_vX.X.txt /etc/init.d/66ocmodule
rm /sdcard/66ocmodule_vX.X.txt
where X.X is the number version

NB5: be extra careful when editing the files. You could mess when with the end of line markers. I recommend using Notepad++ and check if the end of line markers are in unix format (LF) (view/show symbol/show all characters). You can correct that easily with edit/EOL conversion/convert to UNIX format

NB6: make sure there is a blank line in the end of the file as well

V0.2
gets automatically the needed addresses.
Module is supposed to be located at /data/defymini_oc.ko
If troubleshoot refer to the /data/oc.log log file.
Set for a 700MHz oc

Follow steps 1 to 4 for installation. Read NB, NB2 and NB3.

V0.3
Checks for the presence of older versions and gives a warning
Checks if the module is already loaded (unload if true)
Chekcs in the end if the module is loaded
+ Minor changes

pll value and module path can be edited in the beginning of the file

Follow steps 1 to 4 for installation. Read NB, NB2 and NB3.

V0.4
Vdd support
+Minor changes

pll and vdd values and module path can be edited in the beginning of the file

Follow steps 1 to 4 for installation. Read NB, NB2 and NB3.

V0.5
best busybox support
+Minor changes

pll and vdd values and module path can be edited in the beginning of the file

V0.6
Force vdd change if performance governor set
+ Minor changes

Follow steps 1 to 4 for installation. Read all NBs.

pll and vdd values and module path can be edited in the beginning of the file

Follow steps 1 to 4 for installation. Read NB, NB2 and NB3.

V0.7
+ Minor changes

V0.8
Log some info, available in logcat

V0.9
Can adjust all pll values.
Attached Files
File Type: txt 66ocmodule.txt - [Click for QR Code] (310 Bytes, 120 views)
File Type: txt 66ocmodule_v0.2.txt - [Click for QR Code] (662 Bytes, 133 views)
File Type: txt 66ocmodule_v0.3.txt - [Click for QR Code] (1.9 KB, 32 views)
File Type: txt 66ocmodule_v0.4.txt - [Click for QR Code] (3.3 KB, 41 views)
File Type: txt 66ocmodule_v0.5.txt - [Click for QR Code] (3.4 KB, 31 views)
File Type: txt 66ocmodule_v0.6.txt - [Click for QR Code] (4.2 KB, 26 views)
File Type: txt 66ocmodule_v0.7.txt - [Click for QR Code] (4.6 KB, 27 views)
File Type: txt 66ocmodule_V0.8.txt - [Click for QR Code] (5.5 KB, 153 views)
File Type: zip XT320_overclock.zip - [Click for QR Code] (599.0 KB, 363 views)
File Type: img recovery.img - [Click for QR Code] (5.20 MB, 262 views)
File Type: txt 66ocmodule_v0.9.txt - [Click for QR Code] (5.8 KB, 419 views)
File Type: zip XT320_overclockV2.zip - [Click for QR Code] (599.1 KB, 519 views)
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28th March 2013, 11:53 AM |#7  
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Quote:

What could we probably gain by increasing PLL0 and PLL1 ?
And which value should we choose ?

Tried to oc pll1 -> distorted display. can't recommend that. OC'ing PLL0 leads to somewhat faster 480 MHz frequency (480 MHz is generated by PLL0 and DIV2, so 960MHz / 2 => 480 MHz.) In the module only changed PLL2 is payed attention for modified frequency-tables.

---------- Post added at 11:53 AM ---------- Previous post was at 11:25 AM ----------

Quote:
Originally Posted by rootdefyxt320

What's the difference between PLL2 overclocking and PLL4 overclock?

Simple difference: PLL2 exists in SOC, PLL4 does not exist. So Motorola didn't underclock something, they got a crippled MSM7225A. Speed ist limitied by hardware.
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28th March 2013, 12:04 PM |#8  
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I'm pushing pll2_l_val to 73 (+11)
I get 700 MHz stable for now. Without overeating.
I'll keep you posted.
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28th March 2013, 01:08 PM |#9  
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Quote:
Originally Posted by Guitwo2

I'm pushing pll2_l_val to 73 (+11)
I get 700 MHz stable for now. Without overeating.
I'll keep you posted.

Do you still use the "performance" governor?
28th March 2013, 01:53 PM |#10  
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Re: Defy-Mini: Updated the overclock-module
I use setCPU with different governor. All seems to work. Higher freq (600) is replaced by a new one thanks to your OC module.

Btw 700 is stable. I runned some stress tests. Performances are increased. Linpack score goes from. 14.5 to 17.5 MFLOPS.

I was wondering if the soc pll were used by other stuff than cpu. Could explain your troubleshoot when oc pll0.

XT230 rocks now
28th March 2013, 01:59 PM |#11  
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Quote:
Originally Posted by Guitwo2

I use setCPU with different governor. All seems to work. Higher freq (600) is replaced by a new one thanks to your OC module.

Btw 700 is stable. I runned some stress tests. Performances are increased. Linpack score goes from. 14.5 to 17.5 MFLOPS.

XT230 rocks now

...but keep an eye on stability.

For ~16% overclocking ~20% higher MFLOPS? Hmmm.... sounds - interesting.
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